Fault Diagnosis of Flash ADC using DNL Test

نویسندگان

  • Anchada Charoenrook
  • Mani Soma
چکیده

This paper describes a technique which uses the Differential Non Linearity (DNL) test data for fault location and identification of the analog components of a flash ADC. In a flash ADC, a fault in the analog subcircuit is uniquely reflected in the transfer function and therefore also in DNL data.This property is exploited to locate a fault and to identify the error value in analog components of the flash ADC. The technique proposed here relies only on DNL test data. Thus the diagnosis can be carried out using at-operating-speed test data. The paper presents relationship between each fault case and its respective DNL pattern. Fault simulation results of a small flash ADC are presented.

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

A Fault Diagnosis Technique for Flash ADC ’ s

This paper addresses the problem of diagnosis of flash ADC’s and proposes a fault diagnosis technique which employs the Differential NonLinearity (DNL) test data for fault location and identification of the analog components in the converter. In the flash ADC, a fault causes deviation of DNL data from the ideal one. Hence, DNL data can be considered as a functional signature of the ADC. This pr...

متن کامل

A 1.2GSPS 6b Low Power Flash ADC in 0.13μm CMOS for Multi- Gigabit Wireless Communication System

A high-speed low-power flash analog-to-digital converter is designed and optimized in a 0.13μm CMOS technology. The ADC consumes 65mW with a supply voltage of 1.2V at 1.2G samples per second. Static DNL and INL are 0.1 LSB and 0.2LSB respectively. The figure of merit shows 1.3pJ per conversion step. The simulation result of the full flash ADC shows improvement in nonlinearity and power dissipat...

متن کامل

Vlsi Design of 12-bit Adc with 1gsps in 180nm Cmos Integrating with Sar and Two-step Flash Adc

In this paper, a Novel Hybrid ADC consisting of two-step quantizer which has Flash ADC and SAR ADC along with Resistor String DAC is designed and implemented. This Hybrid ADC improves the speed by employing Flash ADC and resolution and power reduction can be achieved by utilizing SAR ADC. The Hybrid architecture carrying 12 bits as resolution, input frequency as 100MHz and sampling frequency is...

متن کامل

A Variability Tolerant System-on-Chip Ready Nano-CMOS Analog-to-Digital Converter

As integrated circuit technologies progress to nanoscale, process variations become relatively large and significantly impact circuit performance. The proactive management of process variation during the design process is critical to ensure effective device yield and to keep manufacturing costs down. In the present scenario, designers are searching for analog-to-digital converter (ADC) architec...

متن کامل

Reducing the Power Consumption in Flash ADC Using 65nm CMOS Technology

Today, given the extensive use of convertors in industry, reducing the power consumed by these convertors is of great importance. This study presents a new method to reduce consumption power in Flash ADC in 65nm CMOS technology. The simulation results indicate a considerable decrease in power consumption, using the proposed method. The simulations used a frequency of 1 GHZ, resulting in decreas...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

عنوان ژورنال:

دوره   شماره 

صفحات  -

تاریخ انتشار 1993